1. Field of the Invention
The present invention relates to an amplifier type solid state imaging device and, particularly relates to a charge modulated device.
2. Description of the Prior Art
An example of a conventional charge modulated device will be described below with reference to FIGS. 1 and 2.
Heretofore, charge modulated devices include as pixels MOS (metal oxide semiconductor) transistors (hereinafter referred to as charge modulated pixel transistors) in which photoelectrically-converted electric charges (i.e., photogenerated electric charges) are stored under the gate electrode and a drain current is modulated and amplified by the above-mentioned electric charges.
FIG. 1 is a plan view showing a structure of a conventional charge modulated device, and FIG. 2 is a cross-sectional view taken along the line II--II in FIG. 1. As shown in FIG. 2, an N-type well region 3 and a P-type well region 4 are formed on a P-type silicon semiconductor substrate 2. On the P-type well region 4 is formed an annular gate electrode 6 made of light-translucent thin film polycrystalline silicon through a gate insulating layer 5, such as an SiO.sub.2 layer or the like. An N-type source region 7 and an N-type drain region 8 are formed on the well region 4 corresponding to the center hole and the outer periphery of the annular gate electrode 6 by self-alignment using the gate electrode as a mask, thereby a charge modulated pixel transistor 9 which serves as a pixel being formed. In FIG. 2, reference numeral 12 depicts an interlayer insulator.
As shown in FIG. 1, a plurality of charge modulated pixel transistors 9 are disposed in columns and rows in which the source regions 7 of the charge modulated pixel transistors 9 corresponding to respective columns are connected to a common signal line 10 formed of a first Al layer and the annular gate electrodes 6 of the charge modulated pixel transistors 9 corresponding to respective rows are connected to a common vertical selection line 11 formed of a second Al layer, for example. In FIG. 1, reference numeral 17 depicts a so-called source contact section to which the source region 7 and the signal line 10 are connected. Reference numeral 18 identifies a so-called gate contact section to which an integral deriving electrode 48 led out from a part of the annular gate electrode 6 and the vertical selection line 11 are connected.
As shown in FIG. 2, in the charge modulated pixel transistor 9, light passed through the annular gate electrode 6 generates electron-hole pair, and holes h are stored in the bulk formed under the annular gate electrode 6 as signal charges.
When a positive voltage is applied to the annular gate electrode 6 through the vertical selection line 11 shown in FIG. 1 to render the charge modulated transistor 9 conductive, a drain current Id is cause flow to to the surface (i.e., channel region). Since the drain current Id is modulated by the signal charges h accumulated under the annular gate electrode 6, the drain current Id is output through the signal line 10 and the modulated amount of the drain current Id is read out.
Specifically, in the charge modulated device 1, when the positive bias is applied to the gate electrode to render the charge modulated pixel transistor conductive, the channel potential modulated by the photogenerated holes stored under the gate electrode is read out as a pixel signal in the form of current or voltage through an output circuit (not shown).